From 0df44f23bd3b9e60a452d624cc0b9096fc51e832 Mon Sep 17 00:00:00 2001 From: James Clarke Date: Thu, 7 Dec 2017 20:32:44 +0000 Subject: [PATCH 1/4] powerpc/lib/sstep: Fix building for powerpcspe On powerpcspe, ptesync is not a recognised instruction and so fails to assemble. We don't expect to have to emulate an lwsync or a ptesync on a 32-bit kernel, so just ifdef them out, and catch any unexpected barrier types. Fixes: 3cdfcbfd32b9 ("powerpc: Change analyse_instr so it doesn't modify *regs") Signed-off-by: James Clarke --- arch/powerpc/lib/sstep.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c index 70274b7b4773..bbad0e601d92 100644 --- a/arch/powerpc/lib/sstep.c +++ b/arch/powerpc/lib/sstep.c @@ -2671,12 +2671,16 @@ void emulate_update_regs(struct pt_regs *regs, struct instruction_op *op) case BARRIER_EIEIO: eieio(); break; +#ifdef __powerpc64__ case BARRIER_LWSYNC: asm volatile("lwsync" : : : "memory"); break; case BARRIER_PTESYNC: asm volatile("ptesync" : : : "memory"); break; +#endif + default: + WARN_ON_ONCE(1); } break; -- 2.15.1